“This application note describes analog-to-digital converter input buffers and protection techniques designed for maximum and reliable data acquisition. The document also briefly covers SCR latch-up, which creates a low-impedance path, and different input protection techniques to ensure that the ADC input voltage does not exceed the converter’s supply voltage.
Author: Cirrus Logic
This application note describes analog-to-digital converter input buffers and protection techniques designed for maximum and reliable data acquisition. The document also briefly covers SCR latch-up, which creates a low-impedance path, and different input protection techniques to ensure that the ADC input voltage does not exceed the converter’s supply voltage.
The design of ADC input buffers and protection circuits is critical for an optimized and reliable data acquisition system. The Crystal semiconductor application note “ADC Input Buffers” covers this area well and system designers should review this information. Since the publication of “ADC Input Buffers”, there have been many requests for additional information and circuits regarding ADC input protection. This application note describes snubber/protection circuits for the CS5336 family of converters. The techniques described are equally applicable to other families of crystal analog-to-digital converters.
The goal of input protection is to ensure that the ADC input voltage never exceeds the converter’s supply voltage. This is accomplished with an op amp buffer between the “outside” world and the ADC input, which then limits the ADC input voltage offset to the range of the converter supply voltage.
There are many high-quality op amps available to design engineers as input buffers, most of which are designed to operate from supplies greater than +/- 5 V. There are potential issues with using the multiple power supplies required. During signal amplitude excursions, transient power-up conditions, or op amp failure, the ADC analog inputs may experience higher voltages than the ADC supply. There are several methods that can be used to clamp the ADC input voltage. Figure 1 shows a diode-clamped input buffer Circuit using multiple supplies. The diode type selected for CR1-CR4 is critical and must be evaluated using the following criteria.
1. Forward bias voltage characteristics. Schottky diodes are preferred due to their low forward bias voltage characteristics.
2. Reverse bias leakage current. The effect of voltage-dependent leakage current is proportional to the circuit impedance and can cause distortion. Leakage current also varies with temperature and must be evaluated over the expected operating temperature range.
3. Reverse Bias Capacitor. Voltage-dependent junction capacitance causes distortion and must be insignificant compared to circuit component values.
The goal of input protection can also be achieved by using the same power supply as the converter to power the input buffer, as shown in Figure 4. This circuit requires fewer components than the circuit of Figure 1, and the use of a common power supply ensures that the op amp output does not exceed the ADC supply voltage. However, the analog voltage required to achieve a full-scale digital output for the CS5336 is typically +/- 3.68 V, and most op amps do not have this output capability from a +/- 5 V supply.
Due to the transient nature of audio signals, digital audio systems typically operate at average levels 10 to 20 dB below full scale. This is to allow enough headroom to handle high-amplitude transients. The increase in full-scale distortion due to regulator tolerance can be considered insignificant. A 2% regulator will avoid this distortion increase if needed.